Mram structure and method of fabricating the same

ABSTRACT

An MRAM structure includes a dielectric layer. A contact hole is disposed in the dielectric layer. A contact plug fills in the contact hole and protrudes out of the dielectric layer. The contact plug includes a lower portion and an upper portion. The lower portion fills in the contact hole. The upper portion is outside of the contact hole. The upper portion has a top side and a bottom side greater than the top side. The top side and the bottom side are parallel. The bottom side is closer to the contact hole than the top side. An MRAM is disposed on the contact hole and contacts the contact plug.

BACKGROUND OF THE INVENTION 1. Field of the Invention

The present invention relates to an MRAM (magnetoresistive random accessmemory) structure, and more particularly, to a method of fabricating theMRAM structure through an ion beam etch process.

2. Description of the Prior Art

Many modern day electronic devices contain electronic memory configuredto store data. Electronic memory may be volatile memory or non-volatilememory. Volatile memory stores data only while it is powered, whilenon-volatile memory is able to store data when power is removed. MRAM isone promising candidate for next generation non-volatile memorytechnology. An MRAM cell includes a magnetic tunnel junction (MTJ)having a variable resistance, located between two electrodes disposedwithin back-end-of-the-line (BEOL) metallization layers.

An MTJ generally includes a layered structure comprising a referencelayer, a free layer and a dielectric barrier in between. The referencelayer of magnetic material has a magnetic vector that always points inthe same direction. The magnetic vector of the free layer is free, butis determined by the physical dimensions of the element. The magneticvector of the free layer points in either of two directions: parallel oranti-parallel with the magnetization direction of the pinned layer.

Conventional MRAMs have some disadvantages, however. For example, thestructures of the contact plugs under the MRAMs have defects. Animproved MRAM structure is therefore required in the field.

SUMMARY OF THE INVENTION

According to a preferred embodiment of the present invention, an MRAMstructure includes a dielectric layer. A contact hole is disposed in thedielectric layer. A contact plug fills in the contact hole and protrudesout of the dielectric layer, wherein the contact plug comprises a lowerportion and an upper portion, the lower portion fills in the contacthole, the upper portion is outside of the contact hole, the upperportion has a top side, a bottom side, a first sloping side and a secondsloping side, the top side and the bottom side are parallel, the bottomside is closer to the contact hole than the top side, the bottom side islarger than the top side, two ends of the first sloping siderespectively connect the top side and the bottom side, and two ends ofthe second sloping side respectively connect the top side and the bottomside. An MRAM is disposed on the contact hole and directly contacts thecontact plug.

According to another preferred embodiment of the present invention, afabricating method of an MRAM structure includes providing a metal lineand a dielectric layer covering the metal line. Later, a contact hole inthe dielectric layer is formed and the metal line is exposed through thecontact hole. Next, a first metal layer is formed to cover and fill thecontact hole. Subsequently, a first planarization process is performedto planarize the first metal layer. After that, a bottom electrode, anMTJ material layer and a top electrode are formed to cover the firstmetal layer after the first planarization process. Finally, an ion beametch process is performed to pattern the top electrode, the MTJ materiallayer, the bottom electrode and the first metal layer to form an MRAMand a contact plug.

These and other objectives of the present invention will no doubt becomeobvious to those of ordinary skill in the art after reading thefollowing detailed description of the preferred embodiment that isillustrated in the various figures and drawings.

BRIEF DESCRIPTION OF THE DRAWINGS

FIG. 1 to FIG. 8 depict a fabricating method of an MRAM structureaccording to a first preferred embodiment of the present invention,wherein:

FIG. 1 depicts a dielectric layer with a memory device region and alogic device region;

FIG. 2 is a fabricating stage following FIG. 1;

FIG. 3 is a fabricating stage following FIG. 2;

FIG. 4 is a fabricating stage following FIG. 3;

FIG. 5 is a fabricating stage following FIG. 4;

FIG. 6 is a fabricating stage following FIG. 5;

FIG. 7 is a fabricating stage following FIG. 6; and

FIG. 8 is a fabricating stage following FIG. 7.

FIG. 9 to FIG. 11 depict a fabricating method of an MRAM structureaccording to a second preferred embodiment of the present invention,wherein:

FIG. 9 depicts a dielectric layer with a memory device region and alogic device region;

FIG. 10 is a fabricating stage following FIG. 9; and

FIG. 11 is a fabricating stage following FIG. 10.

FIG. 12 to FIG. 13 depict a fabricating method of an MRAM structureaccording to a third preferred embodiment of the present invention,wherein:

FIG. 12 depicts spacers disposed on MRAMs; and

FIG. 13 is a fabricating stage following FIG. 12.

FIG. 14 to FIG. 15 depict a fabricating method of contact plugsaccording to a fourth preferred embodiment of the present invention,wherein:

FIG. 14 depicts forming another dielectric layer 114 on a dielectriclayer; and

FIG. 15 is a fabricating stage following FIG. 14.

DETAILED DESCRIPTION

FIG. 1 to FIG. 8 depict a fabricating method of an MRAM structureaccording to a first preferred embodiment of the present invention. Asshown in FIG. 1, a dielectric layer 10 is provided. The dielectric layer10 is divided into a memory device region A and a logic device region B.Metal lines 12 are respectively disposed in the dielectric layer 10within the memory device region A and the logic device region B. In theembodiment of the present invention, three metal lines 12 are disposedin the memory device region A, and one metal line 12 is disposed in thelogic device region B. The metal lines 12 may be part of a metalinterconnection. The dielectric layer 10 serves as an interlayerdielectric. Next, a dielectric layer 14 is disposed on the dielectriclayer 10. The dielectric layer 10 and the dielectric layer 14 maybesilicon oxide, silicon nitride, silicon carbon nitride, siliconoxynitride or silicon oxycarbonitride. Then, a contact hole 16 is formedin the dielectric layer 14 within the memory device region A to exposethe metal lines 12 through the contact hole 16. There are severalcontact holes 16 shown in this embodiment. Each of the metal lines 12respectively serves as a bottom of one contact hole 16. Later, a barrier18 is formed to conformally cover the contact holes 16 and thedielectric layer 14. The barrier 18 is preferably Ti/TiN compositelayer, TaN or other suitable conductive materials. Then, a metal layer20 fills into the contact holes 16 and covers the dielectric layer 14.The metal layer 20 is preferably tungsten, but not limited thereto.Other metals such as aluminum or copper can be the material of the metallayer 20. The fabricating step of the barrier 18 and the metal layer 20may be deposition processes, such as chemical vapor depositionprocesses, physical vapor deposition processes or atomic layerdeposition processes.

As shown in FIG. 2, a planarization process 22 is performed to planarizethe metal layer 20. After planarizing the metal layer 20, part of themetal layer 20 is still outside of the contact holes 16, so a topsurface of the metal layer 20 is higher than a top surface of thebarrier 18. The planarization process 22 may be a chemical mechanicalplanarization. As shown in FIG. 3, a bottom electrode 24 is formed tocover the metal layer 20. Next, the bottom electrode 24 is planarized.According to a preferred embodiment of the present invention, anotherchemical mechanical planarization can be used to planarize the bottomelectrode 24. The bottom electrode 24 can be tantalum or other metals.The formation of the bottom electrode 24 can be a deposition processsuch as a chemical vapor deposition process, a physical vapor depositionprocess or an atomic layer deposition process.

As shown in FIG. 4, a magnetic tunnel junction (MTJ) material layer 26is formed to cover the bottom electrode 24. The MTJ material layer 26can be formed by forming a first ferromagnetic material 28, aninsulating layer 28 and a second ferromagnetic material 32 in sequence.An interlayer 34 can be formed between the insulating layer 30 and thefirst ferromagnetic material 28. An interlayer 36 can be formed betweenthe insulating layer 30 and the second ferromagnetic material 32. Thefirst ferromagnetic material 28 will serve as a reference layer for anMTJ, and a direction of magnetic dipole moment reference layer is fixed.The second ferromagnetic material 32 will serve as a free layer for theMTJ and the free layer alters its direction of magnetic dipole momentbased on different circumstances. The insulating layer 30 serves as atunneling barrier for the MTJ. The materials of the first ferromagneticmaterial 28 and the second ferromagnetic material 32 can independentlyselect from Co, Pt, Co/Ni alloy, Co/Pd alloy, Fe/B alloy, Co/Pt alloy,Gd/Fe alloy, Co/Fe alloy, Co/Fe/B alloy or Ta/Fe/Co alloy. Theinsulating layer 30 can be MgO or Al₂O₃. The interlayer 34 and theinterlayer 36 can be Co/Fe alloy. Later, a top electrode 38 is formed tocover the second ferromagnetic material 32. The top electrode 38 can betantalum or other conductive materials. After that, a mask layer 40 anda patterned photoresist 42 are formed in sequence. The mask layer 40 mayinclude silicon oxide or silicon nitride. The patterned photoresist 42defines the position of the MRAM structure in the memory device regionA. The first ferromagnetic material 28, the interlayers 34/36, theinsulating layer 30, the second ferromagnetic material 32, the topelectrode 38 and the mask layer 40 can be formed by depositionprocesses. The patterned photoresist 42 can be formed by a depositionprocess and a lithographic process.

As shown in FIG. 5, the mask layer 40 and the top electrode 38 areetched through a reactive ion etch process by using the patternedphotoresist 42 as a mask. During the reactive ion etch process, thepatterned photoresist 42 may be consumed. After the reactive ion etchprocess, the mask layer 40 is removed. As shown in FIG. 6, an ion beametch process 44 is performed to pattern the MTJ material layer 26, thebottom electrode 24, the metal layer 20 and the barrier 18 by using theremaining top electrode 38 as a mask. After the ion beam etch process44, the MTJ material layer 26, the top electrode 38 and the bottomelectrode are defined as three MRAMs 46 a/46 b/46 c. The metal layer 20below the MRAMs 46 a/46 b/46 c becomes three contact plugs 48 a/48 b/48c. Each of the MRAMs 46 a/46 b/46 c includes the top electrode 38, theMTJ 126 and the bottom electrode 24. The top electrode 38, the MTJmaterial layer 26, the bottom electrode 24, the metal layer 20 and thebarrier 18 within the logic device region B are removed completely.

Furthermore, the contact plugs 48 a/48 b/48 c respectively electricallyconnect to the metal layer 20 and the MRAM 46 a/46 b/46 c. Each of thecontact plugs 48 a/48 b/48 c respectively includes one of the lowerportions 148 a/148 b/148 c and one of the upper portions 248 a/248 b/248c, wherein the lower portions 148 a/148 b/148 c fill in thecorresponding contact holes 16 and the upper portions 248 a/248 b/248 care outside of the contact holes 16. The lower portions 148 a/148 b/148c are preferably rectangular. Each of the lower portions 148 a/148 b/148c extends from the corresponding contact holes 16 and respectivelyconnects to the corresponding upper portions 248 a/248 b/248 c. Each ofthe upper portions 248 a/248 b/248 c respectively has a top side 52 a/52b/52 c, a bottom side 50 a/50 b/50 c, a first sloping side 54 a/54 b/54c and a second sloping side 56 a/56 b/56 c. The bottom side 50 a/50 b/50c is greater than the opening of each of the contact holes 16. Theinterface between the upper portions 248 a/248 b/248 c and the lowerportions 148 a/148 b/148 c are marked by dashed lines. Although thepresent invention takes three MRAMs 46 a/46 b/46 c and three contactplugs 48 a/48 b/48 c as an example, the numbers of MRAMs and contactplugs can be altered based on different requirements.

It is noteworthy that the top electrode 38, the MTJ material layer 26,the bottom electrode 24, the barrier layer 18 and the metal layer 20 areetched by the ion beam etch process 44 rather than a reactive ion etchprocess. Because the etching ratios of the ion beam etch process 44 toany material are similar values, the MTJ material layer 26, the topelectrode 38 and the bottom electrode 24 can be etched at the same rateduring the ion beam etch process 44. Therefore, the sidewalls of theMRAMs 46 a/46 b/46 c will become more aligned. On the other hand, as thereactive ion etching process is etched by chemical reactions, theetching ratio to different materials in the reactive ion etching processdiffers a lot. If the reactive ion etching process is used to etch thetop electrode 38, the MTJ material layer 26, the bottom electrode 24,the barrier layer 18 and the metal layer 20, the sidewall of the MRAMswill become uneven like a stair. This will influence the electricproperty of the MRAMs 46 a/46 b/46 c. Moreover, the sidewalls of MRAMs46 a/46 b/46 c and the sidewalls contact plugs 48 a/48 b/48 c formed bythe ion beam etch process 44 respectively form several continuoussloping sides, whereas the sidewalls of the MRAMs and the sidewalls ofthe contact plugs formed by the ion reactive etching process areperpendicular to the top surface of the dielectric layer 10.

As shown in FIG. 7, a spacer material layer 58 is formed to cover thememory device region A and the logic device region B. The spacermaterial layer 58 can be silicon nitride. The spacer material layer 58covers the MRAMs 46 a/46 b/46 c and the contact plugs 48 a/48 b/48 c.The first sloping side 54 a/54 b/54 c and the second sloping side 56a/56 b/56 c are entirely covered by the spacer material layer 58. Atthis point, the MRAM structure 100 of the present invention iscompleted. It is noteworthy that the formation of the spacer materiallayer 58 and the ion beam etch process 44 are performed in the samechamber for preventing the oxidation of metals in the MTJ 126, avoidingthe contaminant formed during the ion beam etch process 44 from beingbrought to the next chamber and preventing the material layer formedafterwards from contacting the metals in the MTJ 126.

As shown in FIG. 8, a dielectric layer 60 is formed to cover the spacermaterial layer 58. Later, a metal interconnection 62 is formed in thelogic region B, wherein the metal interconnection 62 contacts the metalline 12 within the logic region device. B.

FIG. 9 to FIG. 11 depict a fabricating method of an MRAM structureaccording to a second preferred embodiment of the present invention,wherein elements which are substantially the same as those in the firstpreferred embodiment are denoted by the same reference numerals; anaccompanying explanation is therefore omitted. According to the secondpreferred embodiment, after the metal layer 20 is formed as shown inFIG. 1, the step shown in FIG. 9 is performed. As shown in FIG. 9, themetal layer 20 and the barrier 18 outside of the contact holes 16 areentirely removed by a planarization process 144, and the top surface ofthe dielectric layer 14 is exposed. As shown in FIG. 10, a metal layer120 is formed to cover the metal layer 20, and part of the metal layer120 directly contacts the top surface of the dielectric layer 14. Asshown in FIG. 11, a planarization process 244 is performed to planarizethe metal layer 120. After the step shown in FIG. 11, the steps in FIG.3 to FIG. 8 can be performed to form the MRAM structure 100.

FIG. 12 to FIG. 13 depict a fabricating method of an MRAM structureaccording to a third preferred embodiment of the present invention,wherein elements which are substantially the same as those in the firstpreferred embodiment are denoted by the same reference numerals; anaccompanying explanation is therefore omitted. After forming the spacermaterial layer 58 as shown in FIG. 12, the spacer material layer 58 canbe etched in the step shown in FIG. 12 to make the spacer material layer58 become several spacers 158. The spacers 158 are respectively disposedat two side of each of the MRAMs 46 a/46 b/46 c. The spacers 158disposed on different MRAMs are not connected to each other. It isnoteworthy that the first sloping sides 54 a/54 b/54 c and the secondsloping sides 56 a/56 b/56 c of the corresponding contact plugs 48 a/48b/48 c are not entirely covered by the spacers 158. That is, at leastpart of the spacer material layer 58 on the first sloping sides 54 a/54b/54 c and the second sloping sides 56 a/56 b/56 c are removed. Afterforming the spacers 58, the step in FIG. 13 can be performed to form adielectric layer 60 to cover the spacers 158. Later, a metalinterconnection 62 is formed within the logic device region B. The metalinterconnection 62 contacts the metal line 12 in the logic device regionB.

As shown in FIG. 7, an MRAM structure 100 includes a dielectric layer14. A contact hole 16 is disposed in the dielectric layer 14. A contactplug 48 b fills in the contact hole 16 and protrudes out of thedielectric layer 14. The contact plug 48 b includes a lower portion 148b and an upper portion 248 b. The lower portion 148 b fills in thecontact hole 16. The upper portion 248 b is outside of the contact hole16. The lower portion 148 extends from the contact hole 16 to connectwith the upper portion 248 b. The upper portion 248 b has a top side 52b, a bottom side 50 b, a first sloping side 54 b and a second slopingside 56 b. The top side 52 b and the bottom side 50 b are parallel. Thebottom side 50 b is closer to the contact hole 16 than the top side 52b. The bottom side 50 b is greater than the top side 52 b. Two ends ofthe first sloping side 54 b respectively connect the top side 52 b andthe bottom side 50 b. Two ends of the second sloping side 56 brespectively connect the top side 52 b and the bottom side 50 b. Thebottom side 50 b is greater than the opening of the contact hole 16. Abarrier 18 is disposed between the contact plug 48 b and the dielectriclayer 14, and the barrier 18 covers the sidewall of the contact hole 16and the top surface of the dielectric layer 14. According to anotherpreferred embodiment of the present invention, the barrier 18 can onlycover the inner sidewall of the contact hole 16 and does not cover thetop surface of the dielectric layer 14. The barrier 18 can be Ti/TiNcomposite layer, tantalum nitride or other suitable conductivematerials.

A dielectric layer 10 is disposed below the dielectric layer 14. A metalline 12 is disposed in the dielectric layer 10 and electrically connectsto the contact plug 48 b. The contact plug 48 b is monolithic and ismade of a single material. According to a preferred embodiment of thepresent invention, the contact plug 48 b is preferably made of tungsten,but not limited thereto. Other metals such as aluminum or copper can beused to form the contact plug 48 b.

An MRAM 46 b is disposed on the contact plug 48 b and contacts thecontact plug 48 b. The MRAM 46 b includes a MTJ 126, a top electrode 38and a bottom electrode 24. The bottom electrode 24 contacts the contactplug 48 b. The MTJ 126 is between the top electrode 38 and the bottomelectrode 24. The MTJ 126 includes a first ferromagnetic material 28, aninsulating layer 30 and a second ferromagnetic material 32. Theinsulating layer 30 is between the first ferromagnetic material 28 andthe second ferromagnetic material 32. An interlayer 34 is between theinsulating layer 30 and the first ferromagnetic material 28. Aninterlayer 36 is between the insulating layer 30 and the secondferromagnetic material 32. A spacer material layer 58 completely coversthe first sloping side 54 b and the second sloping side 56 b. The spacermaterial layer 58 extends to the MRAM 46 b. According to anotherpreferred embodiment of the present invention, as shown in FIG. 12, aspacer 158 only covers part of the first sloping side 54 b and part ofthe second sloping side 56 b.

In general, several MRAMs and contact plugs are arranged on thedielectric layer 14 to form a memory array. FIG. 7 takes three MRAMs 46a/46 b/46 c and three contact plugs 48 a/48 b/48 c as an example.Because the MRAMs 46 a/46 b/46 c and contact plugs 48 a/48 b/48 c aredefined by the ion beam etch process 44, the contact plug 48 b in themiddle has a different profile from that of the contact plugs 48 a/48 cat the right side and the left side. The profile of the MRAM 46 b in themiddle is also different from that of the MRAMs 46 a/46 c at the rightside and the left side. Both of the contact plugs 48 b in the middle andthe MRAM 46 b in the middle have a left-right symmetric profile. Thecontact plugs 48 a/48 c and the MRAMs 46 a/46 c individually have aleft-right asymmetric profile. The following description takes thecontact plug 48 b in the middle and the contact plug 48 c at the rightside as an example. A first angle P1 is disposed between the firstsloping side 54 b and the top side 52 b of the contact plug 48 b. Asecond angle P2 is disposed between the second sloping side 56 b and thetop side 54 b of the contact plug 48 b. The size (in degrees) of thefirst angle P1 equals the size of the second angle P2. A first angle P3is disposed between the first sloping side 54 c and the top side 52 c. Asecond angle P4 is disposed between the second sloping side 56 c and thetop side 52 c. The size (in degrees) of the first angle P3 does notequal the size of the second angle P4.

FIG. 14 to FIG. 15 depict a fabricating method of contact plugsaccording to a fourth preferred embodiment of the present invention,wherein elements which are substantially the same as those in the firstpreferred embodiment are denoted by the same reference numerals; anaccompanying explanation is therefore omitted. As shown in FIG. 14,another dielectric layer 114 is formed on the dielectric layer 14.Later, a metal layer 20 is formed to cover the dielectric layer 114.Then, the metal layer 20 is planarized by a chemical mechanicalplanarization to make the top surface of the metal layer 20 align withthe top surface of the dielectric layer 114. The metal layer 20 which isplanarized becomes contact plugs 48 d entirely embedded in thedielectric layer 114. The disadvantage of the fourth preferredembodiment is that the chemical mechanical planarization leads todishing on the surface of the dielectric layer 114, and holes 66 in thecontact plugs 48 d. The dishing 64 and holes 66 will influence theproperty of the MRAM. Therefore, the dielectric layer 114 is omitted inthe first preferred embodiment and the second preferred embodiment ofthe present invention. In this way, the chemical mechanicalplanarization does not need to stop on the dielectric layer 114 duringthe planarization of the metal layer 20, and the dishing 64 and holes 66can be prevented. Furthermore, the MRAMs 46 a/46 b/46 c in the first,second and third preferred embodiments of the present invention areformed by the ion beam etch process 44. Therefore, the sidewalls of theMRAMs 46 a/46 b/46 c are flat and even.

Those skilled in the art will readily observe that numerousmodifications and alterations of the device and method may be made whileretaining the teachings of the invention. Accordingly, the abovedisclosure should be construed as limited only by the metes and boundsof the appended claims.

1. An MRAM structure, comprising: a dielectric layer; a contact holedisposed in the dielectric layer; a contact plug filling in the contacthole and protruding out of the dielectric layer, wherein the contactplug comprises a lower portion and an upper portion, the lower portionfills in the contact hole, the upper portion is outside of the contacthole, the upper portion has a top side, a bottom side, a first slopingside and a second sloping side, the top side and the bottom side areparallel, the bottom side is closer to the contact hole than the topside, the bottom side is greater than the top side, two ends of thefirst sloping side respectively connect the top side and the bottomside, and two ends of the second sloping side respectively connect thetop side and the bottom side; and an MRAM disposed on the contact holeand directly contacting the contact plug, wherein a sidewall of the MRAMand a sidewall of the contact plug form a continuous sloping sideinclining toward the dielectric layer.
 2. The MRAM structure of claim 1,wherein a first angle is disposed between the first sloping side and thetop side, a second angle is disposed between the second sloping side andthe top side, and the size of the first angle equals the size of thesecond angle.
 3. The MRAM structure of claim 1, wherein a first angle isdisposed between the first sloping side and the top side, a second angleis disposed between the second sloping side and the top side, and thesize of the first angle does not equal the size of the second angle. 4.The MRAM structure of claim 1, further comprising a spacer materiallayer covering the MRAM and the contact plug, wherein the first slopingside and the second sloping side of the contact plug are entirelycovered by the spacer material layer.
 5. The MRAM structure of claim 1,further comprising a spacer covering the MRAM, wherein part of thecontact plug is not covered by the spacer.
 6. The MRAM structure ofclaim 1, wherein the contact plug is monolithic, and is made of a singlematerial.
 7. The MRAM structure of claim 1, wherein the contact plug ismade of tungsten.
 8. The MRAM structure of claim 1, wherein the MRAMcomprises an MTJ, a top electrode and a bottom electrode.
 9. The MRAMstructure of claim 1, wherein a barrier only contacts an inner sidewallof the contact hole.
 10. The MRAM structure of claim 1, wherein abarrier contacts a sidewall of the contact hole and a top surface of thedielectric layer.
 11. A fabricating method of an MRAM structure,comprising: providing a metal line and a dielectric layer covering themetal line; forming a contact hole in the dielectric layer and exposingthe metal line through the contact hole; forming a first metal layercovering and filling the contact hole; performing a first planarizationprocess to planarize the first metal layer; forming a bottom electrode,an MTJ material layer and a top electrode covering the first metal layerafter the first planarization process; and performing an ion beam etchprocess to pattern the top electrode, the MTJ material layer, the bottomelectrode and the first metal layer to form an MRAM and a contact plug.12. The fabricating method of an MRAM structure of claim 11, furthercomprising forming a spacer material layer to cover the MRAM and thecontact plug.
 13. The fabricating method of an MRAM structure of claim12, further comprising etching the spacer material layer to form twospacers at two sides of the MRAM, wherein part of the contact plug isnot covered by the spacer.
 14. The fabricating method of an MRAMstructure of claim 11, wherein the contact plug fills in the contacthole and protrudes from the dielectric layer, the contact plug has alower portion and an upper portion, the lower portion fills in thecontact hole, the upper portion is outside of the contact hole, theupper portion has a top side, a bottom side, a first sloping side and asecond sloping side, the top side and the bottom side are parallel, thebottom side is closer to the contact hole than the top side, the bottomside is greater than the top side, two ends of the first sloping siderespectively connect the top side and the bottom side, two ends of thesecond sloping side respectively connect the top side and the bottomside.
 15. The fabricating method of an MRAM structure of claim 14,wherein a first angle is disposed between the first sloping side and thetop side, a second angle is disposed between the second sloping side andthe top side, and the size of the first angle equals the size of thesecond angle.
 16. The fabricating method of an MRAM structure of claim14, wherein a first angle is disposed between the first sloping side andthe top side, a second angle is disposed between the second sloping sideand the top side, and the size of the first angle does not equal thesize of the second angle.
 17. The fabricating method of an MRAMstructure of claim 11, wherein the contact plug contacts the metal line.18. The fabricating method of an MRAM structure of claim 11, whereinafter planarizing the first metal layer, part of the first metal layeris outside of the contact hole.
 19. The fabricating method of an MRAMstructure of claim 11, further comprising: before forming the firstmetal layer, forming a barrier contacting the contact hole and a topsurface of the dielectric layer, wherein after planarizing the firstmetal layer, a top surface of the first metal layer is aligned with thedielectric layer and the barrier on the top surface of the dielectriclayer is removed.
 20. The fabricating method of an MRAM structure ofclaim 19, further comprising: after planarizing the first metal layer,forming a second metal layer covering the first metal layer; andperforming a second planarization process to planarize the second metallayer, wherein after planarizing the second metal layer, part of thesecond metal layer is outside of the contact hole.